Introduction
Summary
keywords
TODO
HW
Exercise*
Next time
Clock
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clock skew happens when we put a gate to the clock signal.
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how to correct the skew?
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In real cases, the state is not flat. ; the signal damps.
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In order to correct this, we take the criteria of "over 90%" as top state and "under 10%" as bottom state.
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no more clock speed enhancements, due to *